Digital baseband microprocessor for GPS receiver SPECIFICATION
Requirement for the processing capability ( measured with MIPS)
Generally, an embedded microprocessor of GPS receiver's computation
load is
sporadically distributed. The working load of microprocessor is varying
according to the working modes of the receiver.
1. Acquisition Mode.
This is an initial state of GPS receiver. The GPS receiver need to
searching
satellites from the received signal and choosing the best 4-5
satellites to
track. Also, the GPS receiver need to decode the navigation messages
from the
C/A carrier where the ephemeris data are embedded. A fully complete set
of
navigation data for a single satellite is at an amount of 1,500
bits, with a
average data rate of 50bps. According to the ephemeris data downloaded
and the
pseudorange measured by the correlator, the calculation for position
data
requires much computation and processing capability to solving a series
of
second-order equations. Those computations can be rather floating-point
intensive.
2. Tracking Mode
When the GPS receiver is already in sync with the satellites, the
tracking of
the satellite signal is the primary work of GPS receiver. The tracking
algorithm
measures the relative speed of GPS receiver (stationary or mobile) and
adjusts
the Doppler frequency shift for precisely locking the L1 carrier of GPS
satellite (frequency is 1542MHz). Although commercial GPS receiver
normally
update the position data output with a period from 0.1 second to several
seconds, there is no new information from satellite during the period.
Thus
those updates requires very few computation, comparing to the sync mode.
3. Re-Sync Mode
TO save the battery of GPS-receiver, especially for handset type, GPS
receiver
often works in power-save (or named power-off) mode. During the period
of that
mode, the RF frond-end and synchronizer part of the receiver cease to
work in
order to save power consumption. Thus, when the GPS receiver is
re-activated, it
enters into a re-sync mode, whose which can last from a few tens of
seconds to a
few tens of minutes, depending on how much new ephemeris data must be
downloaded. (also it is a correlation with how long the GPS receiver
has been
sleeping). It also depends on how many channels the receiver can track
at once
and how effectively the firmware searches through the
spread-spectrum signal
to find individual satellites. Anyway, the positioning algorithm needs
to be
partly or wholly re-run for the new data update. Thus the computation
need for
Re-Sync is much bigger than tracking mode, but no-more than that of
acquisition
mode.
According to the analysis above, it is obvious that the peak compution
load for
the dedicated microprocessor is in acquisition mode. And, the actual
load is
depending on some factors:
1. The efficiency of the algorithm.
The software of GPS receiver is majorly made up of two parts:
positioning
algorithm and control algorithm. Generally, if the software is
programming in
high-level language, such as C code, the compiled assemble code would
have less
efficiency than a program directly written with instructions. However,
this is a
tradeoff between software develop time and software optimalizition. But
it
affects the computation load of CPU.
2. How sophisticated the GPS system is?
Some GPS receiver has many advanced capabilities, such as has
more-than-required
channels for sync and tracking more than 12 satellites
simultaneously. Some GPS
system provide fancy man-machine interactive interface, especially in a
multimedia sense. And some provide interface to possible integration of
GIS data
processing. All of these has an impact of the demand of microprocessor
capability.
Considering all the things above, also refer to some date-sheets of
commercial
GPS systems, the peak computation load for acquisition is within
a range of 2-6
MIPS , while the computation demand for tracking is only 1-2 MIPS.
Since our design of baseband microprocessor does not show a strong
correlation
with GPS applications, I suggest to boost our computation capability to
40-60
MIPS. This is a feasible and achievable load when we use pipeline tech.
When the
data processing rate is ~60 MIPS, our embedded microprocessor can not
only
suitable for any GPS receiver applications, but also has the adaptive
ability to
other simple wireless applications.
Zhibin Wu